Low-power smart devices are becoming pervasive in our world. Thus, relevant research efforts are directed to the development of innovative low power computing solutions that enable in-memory computations of logic-operations, thus avoiding the von Neumann bottleneck, i.e., the known showstopper of traditional computing architectures. Emerging non-volatile memory technologies, in particular Resistive Random Access memories, have been shown to be particularly suitable to implement logic-in-memory (LIM) circuits based on the material implication logic (IMPLY). However, RRAM devices nonidealities, logic state degradation, and a narrow design space limit the adoption of this logic scheme. In this work, we use a physics-based compact model to study an innovative smart IMPLY (SIMPLY) logic scheme which exploits the peripheral circuitry embedded in ordinary IMPLY architectures to solve the mentioned reliability issues, drastically reducing the energy consumption and setting clear design strategies. We then use SIMPLY to implement a 1-bit full adder and compare the results with other LIM solutions proposed in the literature.

A Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing / Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo. - In: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY. - ISSN 2168-6734. - 8:(2020), pp. 757-764. [10.1109/JEDS.2020.2987402]

A Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing

Zanotti, Tommaso
;
Puglisi, Francesco Maria;Pavan, Paolo
2020

Abstract

Low-power smart devices are becoming pervasive in our world. Thus, relevant research efforts are directed to the development of innovative low power computing solutions that enable in-memory computations of logic-operations, thus avoiding the von Neumann bottleneck, i.e., the known showstopper of traditional computing architectures. Emerging non-volatile memory technologies, in particular Resistive Random Access memories, have been shown to be particularly suitable to implement logic-in-memory (LIM) circuits based on the material implication logic (IMPLY). However, RRAM devices nonidealities, logic state degradation, and a narrow design space limit the adoption of this logic scheme. In this work, we use a physics-based compact model to study an innovative smart IMPLY (SIMPLY) logic scheme which exploits the peripheral circuitry embedded in ordinary IMPLY architectures to solve the mentioned reliability issues, drastically reducing the energy consumption and setting clear design strategies. We then use SIMPLY to implement a 1-bit full adder and compare the results with other LIM solutions proposed in the literature.
14-apr-2020
8
757
764
A Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing / Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo. - In: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY. - ISSN 2168-6734. - 8:(2020), pp. 757-764. [10.1109/JEDS.2020.2987402]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
File in questo prodotto:
File Dimensione Formato  
09066953.pdf

accesso aperto

Descrizione: Articolo principale
Tipologia: Post-print dell'autore (bozza post referaggio)
Dimensione 497.83 kB
Formato Adobe PDF
497.83 kB Adobe PDF Visualizza/Apri
Pubblicazioni consigliate

Caricamento pubblicazioni consigliate

Licenza Creative Commons
I metadati presenti in IRIS UNIMORE sono rilasciati con licenza Creative Commons CC0 1.0 Universal, mentre i file delle pubblicazioni sono rilasciati con licenza Attribuzione 4.0 Internazionale (CC BY 4.0), salvo diversa indicazione.
In caso di violazione di copyright, contattare Supporto Iris

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11380/1201617
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 26
  • ???jsp.display-item.citation.isi??? 23
social impact