The need for processing the continuously growing amount of data that is produced every day is promoting research for the development of energy-efficient non-von Neumann computing architectures. Over the last decade, resistive RAM (RRAM) devices together with material implication logic (IMPLY) were proposed as a promising solution for the development of low-power logic-in-memory (LIM) circuits. Still, the high design complexity and the low reliability of these circuits are hindering their practical realization. It is only recently that a new smart IMPLY architecture, named SIMPLY, was proposed and shown to drastically improve circuit reliability and energy efficiency of IMPLY-based LIM circuits. In this work, we introduce a new smart operation, called sFALSE, enabled by the SIMPLY architecture, and verify its feasibility using a physics-based RRAM compact model calibrated on three different technologies. We highlight the significant advantage of the proposed solution vs. ordinary IMPLY architecture in terms of energy reduction, especially for large fan-in logic operations (e.g., n-bits NAND and EXOR).
Smart Logic-in-Memory Architecture For Ultra-Low Power Large Fan-In Operations / Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo. - (2020), pp. 31-35. (Intervento presentato al convegno 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) tenutosi a Genova, Italy nel 31 Aug.-2 Sept. 2020) [10.1109/AICAS48895.2020.9073870].