We propose in this letter a simple technique based on C-V measurements which allows to estimate the thicknesses of SiOX and high-k layers of IPD stacks. We apply this technique to IPD Al2O3-based stacks for floating gate memory applications, finding a good agreement with TEM measurements. In addition, simulation results are provided to demonstrate the correctness of the basic assumption of this technique.

A technique to extract high-k IPD stack layer thicknesses from C-V measurements / Larcher, Luca; Pavan, Paolo; Padovani, Andrea; G., Ghidini. - In: IEEE ELECTRON DEVICE LETTERS. - ISSN 0741-3106. - STAMPA. - 30:6(2009), pp. 653-655. [10.1109/LED.2009.2018129]

A technique to extract high-k IPD stack layer thicknesses from C-V measurements

LARCHER, Luca;PAVAN, Paolo;PADOVANI, ANDREA;
2009-01-01

Abstract

We propose in this letter a simple technique based on C-V measurements which allows to estimate the thicknesses of SiOX and high-k layers of IPD stacks. We apply this technique to IPD Al2O3-based stacks for floating gate memory applications, finding a good agreement with TEM measurements. In addition, simulation results are provided to demonstrate the correctness of the basic assumption of this technique.
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A technique to extract high-k IPD stack layer thicknesses from C-V measurements / Larcher, Luca; Pavan, Paolo; Padovani, Andrea; G., Ghidini. - In: IEEE ELECTRON DEVICE LETTERS. - ISSN 0741-3106. - STAMPA. - 30:6(2009), pp. 653-655. [10.1109/LED.2009.2018129]
Larcher, Luca; Pavan, Paolo; Padovani, Andrea; G., Ghidini
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/620655
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