Using this new module of Berkeley Reliability Tools (BERT), user can predict the error rate due to single event upset (SEU) in large circuits. The error rate model described here used a well established methodology, but for the first time a different choice is made on picking up the sensitive nodes, enabling a quick prediction even for large circuits.

Simulating single event upset error rate in large digital circuits / Pavan, Paolo; E., Minami; R., Tu; P. K., Ko; C., Hu. - STAMPA. - (1994), pp. 61-64. ((Intervento presentato al convegno 5th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis tenutosi a Glasgow, Scotland nel 4-7 October 1994.

Simulating single event upset error rate in large digital circuits

PAVAN, Paolo;
1994-01-01

Abstract

Using this new module of Berkeley Reliability Tools (BERT), user can predict the error rate due to single event upset (SEU) in large circuits. The error rate model described here used a well established methodology, but for the first time a different choice is made on picking up the sensitive nodes, enabling a quick prediction even for large circuits.
5th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis
Glasgow, Scotland
4-7 October 1994
61
64
Pavan, Paolo; E., Minami; R., Tu; P. K., Ko; C., Hu
Simulating single event upset error rate in large digital circuits / Pavan, Paolo; E., Minami; R., Tu; P. K., Ko; C., Hu. - STAMPA. - (1994), pp. 61-64. ((Intervento presentato al convegno 5th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis tenutosi a Glasgow, Scotland nel 4-7 October 1994.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/737730
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