We apply a systematic approach to identify a high-k/metal gate stack degradation mechanism. Our results demonstrate that the SiO2 interfacial layer controls the overall degradation and breakdown of the high-k gate stacks stressed in inversion. Defects contributing to the gate stack degradation are associated with the high-k/metal-induced oxygen vacancies in the interfacial layer.
Breakdown in the metal/high-k gate stack: Identifying the “weak link” in the multilayer dielectric / G., Bersuker; D., Heh; C., Young; H., Park; P., Khanal; Larcher, Luca; Padovani, Andrea; P., Lenahan; J., Ryan; B. H., Lee; H., Tseng; R., Jammy. - STAMPA. - (2008), pp. 1-4. (Intervento presentato al convegno 2008 IEEE International Electron Devices Meeting, IEDM 2008 tenutosi a San Francisco, CA (USA) nel 15-17 Dec. 2008) [10.1109/IEDM.2008.4796816].
Breakdown in the metal/high-k gate stack: Identifying the “weak link” in the multilayer dielectric
LARCHER, Luca;PADOVANI, ANDREA;
2008
Abstract
We apply a systematic approach to identify a high-k/metal gate stack degradation mechanism. Our results demonstrate that the SiO2 interfacial layer controls the overall degradation and breakdown of the high-k gate stacks stressed in inversion. Defects contributing to the gate stack degradation are associated with the high-k/metal-induced oxygen vacancies in the interfacial layer.Pubblicazioni consigliate
I metadati presenti in IRIS UNIMORE sono rilasciati con licenza Creative Commons CC0 1.0 Universal, mentre i file delle pubblicazioni sono rilasciati con licenza Attribuzione 4.0 Internazionale (CC BY 4.0), salvo diversa indicazione.
In caso di violazione di copyright, contattare Supporto Iris