The present work addresses the design of a 65 nm CMOS wide-band singlesideband mixer for UWB synthesiser. The circuit has been designed inductorless and with few capacitors, in order to save silicon area and, at the same time, to get a mixer independent of the adopted frequency plan and synthesiser architecture.Particular attention has been paid to reducing the spurs as much as possible. In order to address a realistic investigation, the design has accounted also for the corner cases and the possible impairments in the input signals. A comparison with the state-of-the-art of the SSB mixers shows the low power consumption of the present work.
65 nm CMOS SSB mixer for UWB synthesiser / Chiesi, Fabio; Borgarino, Mattia; Mazzanti, Andrea; E., Sacchi; G., Albasini; W., Audoglio. - In: INTERNATIONAL JOURNAL OF ELECTRONICS. - ISSN 0020-7217. - STAMPA. - 95:4(2008), pp. 305-312. [10.1080/00207210801931474]
65 nm CMOS SSB mixer for UWB synthesiser
CHIESI, Fabio;BORGARINO, Mattia;MAZZANTI, Andrea;
2008
Abstract
The present work addresses the design of a 65 nm CMOS wide-band singlesideband mixer for UWB synthesiser. The circuit has been designed inductorless and with few capacitors, in order to save silicon area and, at the same time, to get a mixer independent of the adopted frequency plan and synthesiser architecture.Particular attention has been paid to reducing the spurs as much as possible. In order to address a realistic investigation, the design has accounted also for the corner cases and the possible impairments in the input signals. A comparison with the state-of-the-art of the SSB mixers shows the low power consumption of the present work.
Pubblicazioni consigliate
I metadati presenti in IRIS UNIMORE sono rilasciati con licenza Creative Commons CC0 1.0 Universal, mentre i file delle pubblicazioni sono rilasciati con licenza Attribuzione 4.0 Internazionale (CC BY 4.0), salvo diversa indicazione.
In caso di violazione di copyright, contattare Supporto Iris
