This paper presents for the first time a new compact Spice-like model of an E2PROM memory cell suitable for both DC and transient circuit simulations. This model is based on a new Floating Gate voltage calcuation procedure that improves strongly the accuracy of the modeling of the cell. Moreover, this model features many advantages compared to the previous ones: i) it is simple to implement and scale; ii) its computational time is not critical; iii) its parameter extractin procedure is the same of a MOS transistor; iv) it can be easily upgraded tot ake into account leakage current contributions (SILC).
A new compact Spice-like model of E2PROM Memory cells suitable for DC and transient simulations / Larcher, Luca; Pavan, Paolo; Cuozzo, M.; Marmiroli, A.. - STAMPA. - (2001), pp. 262-265. (Intervento presentato al convegno SISPAD 01 tenutosi a Athens, Greece nel September 5-7, 2001,).