The goal of one PROPHECY subtask was to find a set of realistic test patterns for electrostatic discharge (ESD) and propose an appropriate testing method. Starting with basic test structures, a systematic analysis of the layout parameters dependence of the ESD hardness of various CMOS technologies tested according to the Human Body Model (HBM), Transmission Line Pulser (TLP) and socketed Charged Device Model (CDM) hardness has been carried out. Main emphasis has been given to the correlation between results obtained by the different test methods i.e. HEM and TLP, as well as between HEM and socketed CDM. The results obtained on the basic test structures, which are representative of an analogue technology, are compared (i) with results on optimised test patterns, which more realistically emulate the structure of the actual integrated circuits, and (ii), finally with results on several products. It is shown that the results of a careful analysis of the rest patterns can be applied to real pads, and at the end, even to products. (C) 1999 Elsevier Science Ltd. All rights reserved.

Test structures and testing methods for electrostatic discharge: results of PROPHECY project / G., Meneghesso; E., Zanoni; A., Gerosa; Pavan, Paolo; W., Stadler; K., Esmark; X., Guggenmos. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - STAMPA. - 39 (5):(1999), pp. 635-646. [10.1016/S0026-2714(99)00045-1]

Test structures and testing methods for electrostatic discharge: results of PROPHECY project

PAVAN, Paolo;
1999-01-01

Abstract

The goal of one PROPHECY subtask was to find a set of realistic test patterns for electrostatic discharge (ESD) and propose an appropriate testing method. Starting with basic test structures, a systematic analysis of the layout parameters dependence of the ESD hardness of various CMOS technologies tested according to the Human Body Model (HBM), Transmission Line Pulser (TLP) and socketed Charged Device Model (CDM) hardness has been carried out. Main emphasis has been given to the correlation between results obtained by the different test methods i.e. HEM and TLP, as well as between HEM and socketed CDM. The results obtained on the basic test structures, which are representative of an analogue technology, are compared (i) with results on optimised test patterns, which more realistically emulate the structure of the actual integrated circuits, and (ii), finally with results on several products. It is shown that the results of a careful analysis of the rest patterns can be applied to real pads, and at the end, even to products. (C) 1999 Elsevier Science Ltd. All rights reserved.
39 (5)
635
646
Test structures and testing methods for electrostatic discharge: results of PROPHECY project / G., Meneghesso; E., Zanoni; A., Gerosa; Pavan, Paolo; W., Stadler; K., Esmark; X., Guggenmos. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - STAMPA. - 39 (5):(1999), pp. 635-646. [10.1016/S0026-2714(99)00045-1]
G., Meneghesso; E., Zanoni; A., Gerosa; Pavan, Paolo; W., Stadler; K., Esmark; X., Guggenmos
File in questo prodotto:
Non ci sono file associati a questo prodotto.
Pubblicazioni consigliate

Caricamento pubblicazioni consigliate

Licenza Creative Commons
I metadati presenti in IRIS UNIMORE sono rilasciati con licenza Creative Commons CC0 1.0 Universal, mentre i file delle pubblicazioni sono rilasciati con licenza Attribuzione 4.0 Internazionale (CC BY 4.0), salvo diversa indicazione.
In caso di violazione di copyright, contattare Supporto Iris

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/306051
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 0
  • ???jsp.display-item.citation.isi??? 0
social impact