We systematically explore the design space of ferroelectric hafnium–zirconium oxide (H0.5Z0.5O or HZO) heterostructures for reliable high-temperature operation. HZO films are deposited using thermal and plasma-enhanced atomic layer deposition (Th-ALD and PE-ALD) on tungsten (W) and titanium nitride (TiN) bottom electrodes (BE), while maintaining identical top electrodes. We demonstrate that PE-ALD HZO capacitors integrated with W BE exhibit wake-up-free switching up to 125 ∘ C, along with significantly improved endurance compared to Th-ALD HZO/W devices across a wide temperature range (85– 125 ∘ C). By decoupling the contributions of the plasma-deposited HZO film and the oxidized bottom interface inherently formed during PE-ALD, we identify the oxidized W interfacial layer (WOx) as the primary factor governing endurance enhancement and wake-up suppression at elevated temperatures, while the PE-ALD HZO film provides secondary benefits in reducing wake-up. In contrast, PE-ALD HZO capacitors fabricated on TiN BE show no substantial improvement in wake-up behavior or endurance relative to Th-ALD HZO/TiN devices, despite the formation of an unintentional TiOxNy interfacial layer, and instead exhibit degraded polarization. This difference arises from the significantly weaker endurance enhancement and no wake-up suppression provided by oxidized TiN compared to oxidized W under comparable oxidation conditions. Overall, PE-ALD HZO films enable superior ferroelectric performance at elevated temperatures only when deposited on W BE, while Th-ALD HZO films remain a viable option for high-temperature operation on TiN BE. These findings clarify the interplay between deposition technique, electrode chemistry, and interfacial oxidation, and provide design guidelines for integrating ferroelectric memories into monolithic 3D systems under stringent thermal constraints.

Engineering Wake-Up-Free Ferroelectric Capacitors With Enhanced High-Temperature Reliability / Afroze, N., Soliman, S., Kuo, Y., Kang, S., Tian, M., Ravikumar, P., Padovani, A., Khan, A.. - In: IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY. - ISSN 1530-4388. - 26:3(2026), pp. 656-662. [10.1109/tdmr.2026.3679333]

Engineering Wake-Up-Free Ferroelectric Capacitors With Enhanced High-Temperature Reliability

Padovani, Andrea;
2026

Abstract

We systematically explore the design space of ferroelectric hafnium–zirconium oxide (H0.5Z0.5O or HZO) heterostructures for reliable high-temperature operation. HZO films are deposited using thermal and plasma-enhanced atomic layer deposition (Th-ALD and PE-ALD) on tungsten (W) and titanium nitride (TiN) bottom electrodes (BE), while maintaining identical top electrodes. We demonstrate that PE-ALD HZO capacitors integrated with W BE exhibit wake-up-free switching up to 125 ∘ C, along with significantly improved endurance compared to Th-ALD HZO/W devices across a wide temperature range (85– 125 ∘ C). By decoupling the contributions of the plasma-deposited HZO film and the oxidized bottom interface inherently formed during PE-ALD, we identify the oxidized W interfacial layer (WOx) as the primary factor governing endurance enhancement and wake-up suppression at elevated temperatures, while the PE-ALD HZO film provides secondary benefits in reducing wake-up. In contrast, PE-ALD HZO capacitors fabricated on TiN BE show no substantial improvement in wake-up behavior or endurance relative to Th-ALD HZO/TiN devices, despite the formation of an unintentional TiOxNy interfacial layer, and instead exhibit degraded polarization. This difference arises from the significantly weaker endurance enhancement and no wake-up suppression provided by oxidized TiN compared to oxidized W under comparable oxidation conditions. Overall, PE-ALD HZO films enable superior ferroelectric performance at elevated temperatures only when deposited on W BE, while Th-ALD HZO films remain a viable option for high-temperature operation on TiN BE. These findings clarify the interplay between deposition technique, electrode chemistry, and interfacial oxidation, and provide design guidelines for integrating ferroelectric memories into monolithic 3D systems under stringent thermal constraints.
2026
26
3
656
662
Engineering Wake-Up-Free Ferroelectric Capacitors With Enhanced High-Temperature Reliability / Afroze, N., Soliman, S., Kuo, Y., Kang, S., Tian, M., Ravikumar, P., Padovani, A., Khan, A.. - In: IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY. - ISSN 1530-4388. - 26:3(2026), pp. 656-662. [10.1109/tdmr.2026.3679333]
Afroze, Nashrah; Soliman, Salma; Kuo, Yu-Hsin; Kang, Sanghyun; Tian, Mengkun; Ravikumar, Priyankka; Padovani, Andrea; Khan, Asif
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1421328
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