In this paper, a III-V nanowire TFET technology platform is compared against the predictive technology models of FinFETs at 10 nm node by evaluating the performance of two different comparator topologies. Furthermore, the potential of a hybrid FinFET/TFET approach in multi supply voltage design is addressed by considering level shifter circuits. Both analyses confirm that III-V TFET represents a promising technology option for future integrated circuits with sub-0.4 V operation.
A virtual III-V Tunnel FET technology platform for ultra-low voltage comparators and level shifters / Settino, F.; Lanuzza, M.; Strangio, S.; Crupi, F.; Palestri, Pierpaolo; Esseni, David. - (2017), pp. 145-148. (Intervento presentato al convegno 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME 2017) tenutosi a Giardini Naxos-Taormina (Italy) nel 12th-15th June 2017) [10.1109/PRIME.2017.7974128].
A virtual III-V Tunnel FET technology platform for ultra-low voltage comparators and level shifters
PALESTRI, Pierpaolo;ESSENI, David
2017
Abstract
In this paper, a III-V nanowire TFET technology platform is compared against the predictive technology models of FinFETs at 10 nm node by evaluating the performance of two different comparator topologies. Furthermore, the potential of a hybrid FinFET/TFET approach in multi supply voltage design is addressed by considering level shifter circuits. Both analyses confirm that III-V TFET represents a promising technology option for future integrated circuits with sub-0.4 V operation.
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