Reliability physics of ferroelectric/negative capacitance transistors for memory/logic applications: An integrative perspective

Despite the remarkable development in ferroelectric HfO2-based FETs, key reliability challenges (e.g., retention, endurance, etc.) may still limit their widespread adoption in memory and logic applications. In this paper, we present a simple theoretical framework—based on the Landau theory of phase transition—to design both ferroelectric FETs (FeFETs) and negative capacitance transistors (NCFETs) and investigate their reliability issues. For FeFETs, we analyze the role of interface and bulk traps on memory window closure to quantify endurance under different operating conditions. For NCFETs, we discuss the beneficial role of NC effect in reducing (or even eliminating) the persistent reliability issue of negative bias temperature instability that has plagued MOSFETs for decades. FE/NCFETs can also be affected by the Hot Atom Damage involving switching-induced bond dissociation during transient overshoot. We conclude by discussing how other FET reliability issues (e.g., TDDB, HCD, etc.) may also have to be reinterpreted for FE/NCFETs.