Substrate and temperature influence on the trap density distribution in high-k III-V MOSFETs

In this work we apply a new spectroscopic technique based on the simulation of capacitance and conductance measurements to investigate the defect density in high-ț/III-V MOSFETs. This technique exploits the simulation of C-V and GV curves measured over a wide frequency range to extract the defect density map in the energy-position domain. The technique was used to investigate the role of the substrate material and the temperature on the interfacial and bulk defect distributions in the gate stack in InGaAs MOS capacitors grown on both InP and Si substrate. It was found that the substrate material does not affect the defect density in the gate dielectric stack. Applying the technique to C-V and G-V curves measured at different temperatures allows extracting the relaxation energy of defects, an important parameter connected to their atomic nature.