In this paper, we have studied the charge trapping mechanisms of nitride-based non-volatile memories. The impact of different silicon-nitride (SiN) compositions (standard, std, and Si-rich) on the device characteristics has been investigated through material characterizations, electrical measurements, atomistic and electrical simulations. We found that the different physical nature of the dominant defects in the two SiN compositions is at the origin of the different device electrical behaviors. In particular, we argue that the different electron occupation number of the defect states of the two SiN materials explains the observed faster erasing speed and charge loss rate of Si-rich SiN devices, with respect to std SiN devices, in spite of comparable programming behavior. A simple trap model is proposed to improve state of the art simulators of SiN based memories.

New insight on the charge trapping mechanisms of SiN--based memory by atomistic simulations and electrical modeling / Vianello, Elisa; Perniola, L; Blaise, P; Molas, G; COLONNA J., P; Driussi, Francesco; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Rochat, N; Licitra, C; Lafond, D; Kies, R; Reimbold, G; DE SALVO, B; Boulanger, F.. - (2009), pp. 83-86. (Intervento presentato al convegno 2009 International Electron Devices Meeting, IEDM 2009 tenutosi a Baltimore, MD, usa nel Dicembre 2009) [10.1109/IEDM.2009.5424414].

New insight on the charge trapping mechanisms of SiN--based memory by atomistic simulations and electrical modeling

PALESTRI, Pierpaolo;SELMI, Luca;
2009

Abstract

In this paper, we have studied the charge trapping mechanisms of nitride-based non-volatile memories. The impact of different silicon-nitride (SiN) compositions (standard, std, and Si-rich) on the device characteristics has been investigated through material characterizations, electrical measurements, atomistic and electrical simulations. We found that the different physical nature of the dominant defects in the two SiN compositions is at the origin of the different device electrical behaviors. In particular, we argue that the different electron occupation number of the defect states of the two SiN materials explains the observed faster erasing speed and charge loss rate of Si-rich SiN devices, with respect to std SiN devices, in spite of comparable programming behavior. A simple trap model is proposed to improve state of the art simulators of SiN based memories.
2009
2009 International Electron Devices Meeting, IEDM 2009
Baltimore, MD, usa
Dicembre 2009
83
86
Vianello, Elisa; Perniola, L; Blaise, P; Molas, G; COLONNA J., P; Driussi, Francesco; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Rochat, N; Licitra, C; Lafond, D; Kies, R; Reimbold, G; DE SALVO, B; Boulanger, F.
New insight on the charge trapping mechanisms of SiN--based memory by atomistic simulations and electrical modeling / Vianello, Elisa; Perniola, L; Blaise, P; Molas, G; COLONNA J., P; Driussi, Francesco; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Rochat, N; Licitra, C; Lafond, D; Kies, R; Reimbold, G; DE SALVO, B; Boulanger, F.. - (2009), pp. 83-86. (Intervento presentato al convegno 2009 International Electron Devices Meeting, IEDM 2009 tenutosi a Baltimore, MD, usa nel Dicembre 2009) [10.1109/IEDM.2009.5424414].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1163536
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