In this work a non-local band-to-band tunnelling model has been implemented into a full-band Monte Carlo simulator. Two different approaches for the choice of the tunnelling path have been implemented and their impact on the transfer characteristics of different Tunnel FET structures is investigated. In both the SOI and the DG TFET architectures we have simulated, up to 1 order of magnitude of underestimation in the current and up to 15% of difference in the value of the Subthreshold Slope can be found according to the choice of the tunnelling path.

Tunneling path impact on semi-classical numerical simulations of TFET devices / DE MICHIELIS, Luca; Iellina, Matteo; Palestri, Pierpaolo; Ionescu, A; Selmi, Luca. - (2011), pp. 146-149. (Intervento presentato al convegno 2011 12th International Conference on Ultimate Integration on Silicon, ULIS 2011 tenutosi a Cork, irl nel marzo) [10.1109/ULIS.2011.5758002].

Tunneling path impact on semi-classical numerical simulations of TFET devices

PALESTRI, Pierpaolo;SELMI, Luca
2011

Abstract

In this work a non-local band-to-band tunnelling model has been implemented into a full-band Monte Carlo simulator. Two different approaches for the choice of the tunnelling path have been implemented and their impact on the transfer characteristics of different Tunnel FET structures is investigated. In both the SOI and the DG TFET architectures we have simulated, up to 1 order of magnitude of underestimation in the current and up to 15% of difference in the value of the Subthreshold Slope can be found according to the choice of the tunnelling path.
2011
2011 12th International Conference on Ultimate Integration on Silicon, ULIS 2011
Cork, irl
marzo
146
149
DE MICHIELIS, Luca; Iellina, Matteo; Palestri, Pierpaolo; Ionescu, A; Selmi, Luca
Tunneling path impact on semi-classical numerical simulations of TFET devices / DE MICHIELIS, Luca; Iellina, Matteo; Palestri, Pierpaolo; Ionescu, A; Selmi, Luca. - (2011), pp. 146-149. (Intervento presentato al convegno 2011 12th International Conference on Ultimate Integration on Silicon, ULIS 2011 tenutosi a Cork, irl nel marzo) [10.1109/ULIS.2011.5758002].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1163484
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