We present for the first time high performance Nanowire (NW) Tunnel FETs (TFET) obtained with a CMOS-compatible process flow featuring compressively strained Si1-xGex (x=0, 0.2, 0.25) nanowires, Si0.7Ge0.3 Source and Drain and High-K/Metal gate. Nanowire architecture strongly improves electrostatics, while low bandgap channel (SiGe) provides increased band-to-band tunnel (BTBT) current to tackle low ON current challenges. We analyse the impact of these improvements on TFETs and compare them to MOSFET ones. Nanowire width scaling effects on TFET devices are also investigated, showing a W-3 dependence of ON current (ION) per wire. The fabricated devices exhibit higher ION than any previously reported TFET, with values up to 760μA/μm and average subthreshold slopes (SS) of less than 80mV/dec.

First Demonstration of Strained SiGe Nanowires TFETs with ION beyond 700μA/μm / A., Villalon; C., Le Royer; P., Nguyen; S., Barraud; F., Glowacki; Revelant, Alberto; Selmi, Luca; S., Cristoloveanu; L., Tosti; C., Vizioz; J. M., Hartmann; N., Bernier; B., Prévitali; C., Tabone; F., Allain; S., Martinie; O., Rozeau; M., Vinet. - STAMPA. - (2014), pp. 66-67. (Intervento presentato al convegno 34th Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers tenutosi a Honolulu, HI nel 9-12 giugno 2014) [10.1109/VLSIT.2014.6894369].

First Demonstration of Strained SiGe Nanowires TFETs with ION beyond 700μA/μm

SELMI, Luca;
2014

Abstract

We present for the first time high performance Nanowire (NW) Tunnel FETs (TFET) obtained with a CMOS-compatible process flow featuring compressively strained Si1-xGex (x=0, 0.2, 0.25) nanowires, Si0.7Ge0.3 Source and Drain and High-K/Metal gate. Nanowire architecture strongly improves electrostatics, while low bandgap channel (SiGe) provides increased band-to-band tunnel (BTBT) current to tackle low ON current challenges. We analyse the impact of these improvements on TFETs and compare them to MOSFET ones. Nanowire width scaling effects on TFET devices are also investigated, showing a W-3 dependence of ON current (ION) per wire. The fabricated devices exhibit higher ION than any previously reported TFET, with values up to 760μA/μm and average subthreshold slopes (SS) of less than 80mV/dec.
2014
34th Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers
Honolulu, HI
9-12 giugno 2014
66
67
A., Villalon; C., Le Royer; P., Nguyen; S., Barraud; F., Glowacki; Revelant, Alberto; Selmi, Luca; S., Cristoloveanu; L., Tosti; C., Vizioz; J. M., Ha...espandi
First Demonstration of Strained SiGe Nanowires TFETs with ION beyond 700μA/μm / A., Villalon; C., Le Royer; P., Nguyen; S., Barraud; F., Glowacki; Revelant, Alberto; Selmi, Luca; S., Cristoloveanu; L., Tosti; C., Vizioz; J. M., Hartmann; N., Bernier; B., Prévitali; C., Tabone; F., Allain; S., Martinie; O., Rozeau; M., Vinet. - STAMPA. - (2014), pp. 66-67. (Intervento presentato al convegno 34th Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers tenutosi a Honolulu, HI nel 9-12 giugno 2014) [10.1109/VLSIT.2014.6894369].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1163386
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