This paper presents SiGe nanowire tunneling field effect transistors (TFETs) cointegrated with MOSFETs. The process is detailed, and the differences between TFET injection (Band-to-Band Tunneling or BTBT) and MOSFET thermionic injection are outlined. The fabricated TFETs exhibit record ON-current performances at room temperature, three times higher than previous state of the art. Low-temperature measurements are conducted to clarify the device physics. It is shown that subthreshold slope degradation is a result of trap assisted tunneling; careful control of the defect-inducing process steps could lead to slopes lower than 60mV/dec at room temperature, without degradation of ON-state current.
High Performance SiGe Nanowire Tunnel FETs: Low Temperature Characterization for Device Process Optimization / A., Villalon; Revelant, Alberto; C., Le Royer; P., Nguyen; Selmi, Luca; S., Cristoloveanu. - STAMPA. - (2014). (Intervento presentato al convegno 11th International Workshop On Low Temperatures Electronics (WOLTE) tenutosi a Grenoble, France nel 7-9 Luglio 2014).
High Performance SiGe Nanowire Tunnel FETs: Low Temperature Characterization for Device Process Optimization
SELMI, Luca;
2014
Abstract
This paper presents SiGe nanowire tunneling field effect transistors (TFETs) cointegrated with MOSFETs. The process is detailed, and the differences between TFET injection (Band-to-Band Tunneling or BTBT) and MOSFET thermionic injection are outlined. The fabricated TFETs exhibit record ON-current performances at room temperature, three times higher than previous state of the art. Low-temperature measurements are conducted to clarify the device physics. It is shown that subthreshold slope degradation is a result of trap assisted tunneling; careful control of the defect-inducing process steps could lead to slopes lower than 60mV/dec at room temperature, without degradation of ON-state current.File | Dimensione | Formato | |
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