Tunnel FETs are perceived as promising emerging devices to improve the energy efficiency of CMOS integrated circuits. This paper presents results and discussions about some selected topics concerning the working principles and design options of Tunnel FETs, which we believe will play an important role in the development and optimization of these transistors in the near term future.
Challenges and opportunities in the design of Tunnel FETs: materials, device architectures, and defects / Esseni, David; M. G., Pala; Revelant, Alberto; Palestri, Pierpaolo; Selmi, Luca; M., Li; G., Snider; D., Jena; H. G., Xing. - In: ECS TRANSACTIONS. - ISSN 1938-5862. - STAMPA. - 64:6(2014), pp. 581-595. (Intervento presentato al convegno 6th SiGe, Ge, and Related Compounds: Materials, Processing and Devices Symposium - 2014 ECS and SMEQ Joint International Meeting tenutosi a mex nel 2014) [10.1149/06406.0581ecst].
Challenges and opportunities in the design of Tunnel FETs: materials, device architectures, and defects
PALESTRI, Pierpaolo;SELMI, Luca;
2014
Abstract
Tunnel FETs are perceived as promising emerging devices to improve the energy efficiency of CMOS integrated circuits. This paper presents results and discussions about some selected topics concerning the working principles and design options of Tunnel FETs, which we believe will play an important role in the development and optimization of these transistors in the near term future.File | Dimensione | Formato | |
---|---|---|---|
2014_Esseni_Challenges and opportunities in the design of.pdf
Accesso riservato
Dimensione
2.12 MB
Formato
Adobe PDF
|
2.12 MB | Adobe PDF | Visualizza/Apri Richiedi una copia |
Pubblicazioni consigliate
I metadati presenti in IRIS UNIMORE sono rilasciati con licenza Creative Commons CC0 1.0 Universal, mentre i file delle pubblicazioni sono rilasciati con licenza Attribuzione 4.0 Internazionale (CC BY 4.0), salvo diversa indicazione.
In caso di violazione di copyright, contattare Supporto Iris