A 2.5 Gb/s high-speed serial transmitter for automotive applications has been designed and a circuit/package/board integrated simulation procedure has been set up, enabling the co-design of High-Speed-Serial Interfaces. This simulation methodology employs transistor level models of the transmitter combined with physical-based models of the transmission channel, thus no simplified behavioral models are needed. Model/hardware correlation is reported, including eye closure and jitter effects. Good mutual agreement is found between experiments and simulations.
Design, characterization and signal integrity analysis of a 2.5 Gb/s high-speed serial interface for automotive applications overarching the chip/PCB wall / Cossettini, Andrea; Cristofoli, A.; Grollitsch, W.; Alves, L.; Nonis, R.; Ricca, L. Della; Palestri, Pierpaolo; Selmi, Luca. - ELETTRONICO. - (2015), pp. 34-38. (Intervento presentato al convegno 1st IEEE International Forum on Research and Technologies for Society and Industry, RTSI 2015 tenutosi a Torino, Italia nel 16-18 settembre 2015) [10.1109/RTSI.2015.7325068].
Design, characterization and signal integrity analysis of a 2.5 Gb/s high-speed serial interface for automotive applications overarching the chip/PCB wall
PALESTRI, Pierpaolo;SELMI, Luca
2015
Abstract
A 2.5 Gb/s high-speed serial transmitter for automotive applications has been designed and a circuit/package/board integrated simulation procedure has been set up, enabling the co-design of High-Speed-Serial Interfaces. This simulation methodology employs transistor level models of the transmitter combined with physical-based models of the transmission channel, thus no simplified behavioral models are needed. Model/hardware correlation is reported, including eye closure and jitter effects. Good mutual agreement is found between experiments and simulations.
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