This paper presents a new model for the frequency of oscillation, the oscillation amplitude and the phase-noise of ring oscillators consisting of MOS-current-mode-logic delay cells. The numerical model has been validated through circuit simulations of oscillators designed with a typical 130 nm CMOS technology. A design flow based on the proposed model and on circuit simulations is presented and applied to cells with active loads. The choice of the cell parameters that minimize phase-noise and power consumption is addressed.

A numerical model for the oscillation frequency, the amplitude and the phase-noise of MOS-current-mode-logic ring oscillators / Nocente, M; Fontanelli, D; Palestri, P; Nonis, R; Esseni, D; Selmi, L. - In: INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. - ISSN 0098-9886. - 38:6(2010), pp. 607-629. [10.1002/cta.591]

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