In this work a quasi-analytical physical model for the accurate prediction of the potential of GAA nanowire transistors with an arbitrary regular polygon as a cross section is developed. Two case studies concerning triangular and square cross-sections are particularly investigated and analyzed. The model is then extended to the transport direction; general expressions for the natural length are derived and validated by means of two- and three-dimensional numerical device simulations. Basic design guidelines, using an original analytical expression of the natural length, for robust electrostatic design are proposed, to predict the minimum technological gate length able to assure immunity to the SCEs.

A model for robust electrostatic design of nanowire FETs with arbitrary polygonal cross sections / DE MICHIELIS, Luca; Selmi, Luca; Ionescu, A. M.. - (2009), pp. 472-475. ((Intervento presentato al convegno 39th European Solid-State Device Research Conference, ESSDERC 2009 tenutosi a Athens, grc nel september 2009 [10.1109/ESSDERC.2009.5331322].

A model for robust electrostatic design of nanowire FETs with arbitrary polygonal cross sections

SELMI, Luca;
2009-01-01

Abstract

In this work a quasi-analytical physical model for the accurate prediction of the potential of GAA nanowire transistors with an arbitrary regular polygon as a cross section is developed. Two case studies concerning triangular and square cross-sections are particularly investigated and analyzed. The model is then extended to the transport direction; general expressions for the natural length are derived and validated by means of two- and three-dimensional numerical device simulations. Basic design guidelines, using an original analytical expression of the natural length, for robust electrostatic design are proposed, to predict the minimum technological gate length able to assure immunity to the SCEs.
39th European Solid-State Device Research Conference, ESSDERC 2009
Athens, grc
september 2009
472
475
DE MICHIELIS, Luca; Selmi, Luca; Ionescu, A. M.
A model for robust electrostatic design of nanowire FETs with arbitrary polygonal cross sections / DE MICHIELIS, Luca; Selmi, Luca; Ionescu, A. M.. - (2009), pp. 472-475. ((Intervento presentato al convegno 39th European Solid-State Device Research Conference, ESSDERC 2009 tenutosi a Athens, grc nel september 2009 [10.1109/ESSDERC.2009.5331322].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1162981
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