Experimental results are interpreted in terms of a simple lumped-element model that is also used to reproduce the hysteresis phenomenon with discrete components. The hysteresis is related to a three-dimensional (3-D) nonuniformity in the current distribution. Such hysteresis can lead to an erroneous evaluation of latchup parameters, such as the holding current density.
Hysteresis cycle in the Latch-up characteristic of wide CMOS structures / Selmi, Luca; Sangiorgi, Enrico; Crisenza, G; Re, D; Ricco, B.. - In: IEEE ELECTRON DEVICE LETTERS. - ISSN 0741-3106. - STAMPA. - 5:5(1988), pp. 214-216. [10.1109/55.694]
Hysteresis cycle in the Latch-up characteristic of wide CMOS structures
SELMI, Luca;
1988
Abstract
Experimental results are interpreted in terms of a simple lumped-element model that is also used to reproduce the hysteresis phenomenon with discrete components. The hysteresis is related to a three-dimensional (3-D) nonuniformity in the current distribution. Such hysteresis can lead to an erroneous evaluation of latchup parameters, such as the holding current density.
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