A readout chip, consisting of 32×32 square cells, has been designed in a 65 nm CMOS technology. The circuit will be bump bonded to a slim/active edge pixel sensor to form the first demonstrator for the PixFEL X-ray imager, envisaged for applications to experiments at the next generation X-ray FELs. The pixel pitch is 110 μm, for a total area of about 16 mm2. Different solutions for the readout channel, which includes a charge preamplifier, a time-variant filter and a 10 bit ADC, have been integrated in the chip. In particular, a couple of different versions for the time-variant processor have been implemented. The charge preamplifier is provided with four different gain settings, therefore improving the system capability to comply with photon energies in the 1 keV to 10 keV interval. This work, besides discussing in detail the readout channel and array architecture, will present the first results from the chip characterization.
PFM2: A 32×32 readout chip for the PixFEL X-ray imager demonstrator / Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G. -F.; Mendicino, R.; Pancheri, L.; Verzellesi, G.; Xu, H.. - 2017-:(2016), pp. 1-5. (Intervento presentato al convegno 2016 IEEE Nuclear Science Symposium, Medical Imaging Conference and Room-Temperature Semiconductor Detector Workshop, NSS/MIC/RTSD 2016 tenutosi a Strasbourg, France nel 2016) [10.1109/NSSMIC.2016.8069724].
PFM2: A 32×32 readout chip for the PixFEL X-ray imager demonstrator
Verzellesi, G.;
2016
Abstract
A readout chip, consisting of 32×32 square cells, has been designed in a 65 nm CMOS technology. The circuit will be bump bonded to a slim/active edge pixel sensor to form the first demonstrator for the PixFEL X-ray imager, envisaged for applications to experiments at the next generation X-ray FELs. The pixel pitch is 110 μm, for a total area of about 16 mm2. Different solutions for the readout channel, which includes a charge preamplifier, a time-variant filter and a 10 bit ADC, have been integrated in the chip. In particular, a couple of different versions for the time-variant processor have been implemented. The charge preamplifier is provided with four different gain settings, therefore improving the system capability to comply with photon energies in the 1 keV to 10 keV interval. This work, besides discussing in detail the readout channel and array architecture, will present the first results from the chip characterization.
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