This work presents the characterization results of the first prototype of a readout channel for silicon pixel detectors, developed by the PixFEL collaboration in view of future X-ray Free Electron Laser (FEL) applications. The circuit, fabricated in a 65 nm CMOS technology by TSMC, has been designed to deal with a maximum input signal of 104 photons with energy from 1 keV to 10 keV, by exploiting a non-linear technique implemented at front-end level. Moreover, it has been envisioned for operation with the demanding frame rates of next generation FEL facilities, which can reach a few MHz. This paper presents results from measurements performed on the building blocks of the readout processor, along with a summary of the overall performance of the complete readout channel.
A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs / Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benckechkache, M. A.; Betta, G. F. Dalla; Mendicino, R.; Pancheri, L.; Verzellesi, Giovanni; Xu, H.. - (2016), pp. 1-5. (Intervento presentato al convegno 2015 IEEE Nuclear Science Symposium and Medical Imaging Conference, NSS/MIC 2015 tenutosi a San Diego (USA) nel 31/10/2015-7/11/2015) [10.1109/NSSMIC.2015.7581954].
A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs
Ratti, L.;Verzellesi, Giovanni;
2016
Abstract
This work presents the characterization results of the first prototype of a readout channel for silicon pixel detectors, developed by the PixFEL collaboration in view of future X-ray Free Electron Laser (FEL) applications. The circuit, fabricated in a 65 nm CMOS technology by TSMC, has been designed to deal with a maximum input signal of 104 photons with energy from 1 keV to 10 keV, by exploiting a non-linear technique implemented at front-end level. Moreover, it has been envisioned for operation with the demanding frame rates of next generation FEL facilities, which can reach a few MHz. This paper presents results from measurements performed on the building blocks of the readout processor, along with a summary of the overall performance of the complete readout channel.Pubblicazioni consigliate
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