Passivated devices show a permanent decrease of drain current and transconductance at high gate bias. The degradation is attributed to negative charge accumulation at the surface leading to cap depletion, and tends to be weaker in selectively etched gate devices, where the cap is laterally etched away much more. This dc effect is mirrored by a reduction of the current gain cutoff frequency in the same bias range. Some devices experience as a consequence of the stress, a permanent threshold voltage increase and a transconductance compression similar to that of the passivated samples. Others show a temporary reduction of the threshold voltage resulting in an increase of the drain current for fixed gate and drain bias.
Effect of passivation on the hot electron degradation of lattice-matched InAlAs/InGaAs/InP HEMTs / Menozzi, R.; Borgarino, M.; Baeyens, Y.; van der Zanden, K.; Van Hove, M.; Fantini, F.. - (1997), pp. 153-156. (Intervento presentato al convegno 1997 International Conference on Indium Phosphide and Related Materials tenutosi a Cape Cod, MA, USA, nel 1997).