We demonstrated device architectures implementing suspended InAs nanowires for thermal conductivity measurements. To this aim, we exploited a fabrication protocol involving the use of a sacrificial layer. The relatively large aspect ratio of our nanostructures combined with their low electrical resistance allows to exploit the four-probe 3ω technique to measure the thermal conductivity, inducing electrical self-heating in the nanowire at frequency ω and measuring the voltage drop across the nanostructure at frequency 3ω. In our systems, field effect modulation of the transport properties can be achieved exploiting fabricated side-gate electrodes in combination with the SiO2/Si ++ substrate acting as a back gate. Our device architectures can open new routes to the all-electrical investigation of thermal parameters in III-V semiconductor nanowires, with a potential impact on thermoelectric applications.
Suspended InAs Nanowire-Based Devices for Thermal Conductivity Measurement Using the 3ω Method / Rocci, Mirko; Demontis, Valeria; Prete, Domenic; Ercolani, Daniele; Sorba, Lucia; Beltram, Fabio; Pennelli, Giovanni; Roddaro, Stefano; Rossella, Francesco. - In: JOURNAL OF MATERIALS ENGINEERING AND PERFORMANCE. - ISSN 1059-9495. - 27:12(2018), pp. 6299-6305. [10.1007/s11665-018-3715-x]
Suspended InAs Nanowire-Based Devices for Thermal Conductivity Measurement Using the 3ω Method
Ercolani, Daniele;Sorba, Lucia;Rossella, Francesco
2018
Abstract
We demonstrated device architectures implementing suspended InAs nanowires for thermal conductivity measurements. To this aim, we exploited a fabrication protocol involving the use of a sacrificial layer. The relatively large aspect ratio of our nanostructures combined with their low electrical resistance allows to exploit the four-probe 3ω technique to measure the thermal conductivity, inducing electrical self-heating in the nanowire at frequency ω and measuring the voltage drop across the nanostructure at frequency 3ω. In our systems, field effect modulation of the transport properties can be achieved exploiting fabricated side-gate electrodes in combination with the SiO2/Si ++ substrate acting as a back gate. Our device architectures can open new routes to the all-electrical investigation of thermal parameters in III-V semiconductor nanowires, with a potential impact on thermoelectric applications.Pubblicazioni consigliate
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