電界効果型トランジスタの表面に、誘電性材料の堆積/成長させ、誘電性材料をエッチングし、および、メタルを蒸着させる、連続的なステップを用いる、シングルゲートまたはマルチゲートプレートの製造プロセス。本製造プロセスのは、誘電性材料の堆積/成長が、典型的には、非常によく制御できるプロセスなので、フィールドプレート動作を厳しく制御できる。さらに、デバイス表面に堆積された誘電性材料は、デバイスの真性領域から除去される必要はない。このため、乾式または湿式のエッチングプロセスで受けるダメージの少ない材料を用いることなく、フィールドプレートされたデバイスを、実現することができる。マルチゲートフィールドプレートを使うと、マルチ接続を使用するので、ゲート抵抗を減らすこともでき、こうして、大周辺デバイスおよび/またはサブミクロンゲートデバイスの性能を向上することができる。

Single gate or multi-gate plate manufacturing process using sequential steps of depositing / growing dielectric material, etching dielectric material, and depositing metal on the surface of a field effect transistor. Since the manufacturing process is typically a process where the deposition / growth of the dielectric material is very well controlled, field plate operation can be tightly controlled. Furthermore, the dielectric material deposited on the device surface need not be removed from the intrinsic region of the device. For this reason, a field-plated device can be realized without using a material that is less damaged by a dry or wet etching process. Using multi-gate field plates can also reduce gate resistance because of the use of multiple connections, thus improving the performance of large peripheral devices and / or sub-micron gate devices.

シングルゲートまたはマルチゲートフィールドプレート製造 / Chini, Alessandro; Mishra, Umesh K.; Parikh, Primit; Wu, Yifeng. - (2007 Mar 08).

シングルゲートまたはマルチゲートフィールドプレート製造

Alessandro Chini;
2007

Abstract

Single gate or multi-gate plate manufacturing process using sequential steps of depositing / growing dielectric material, etching dielectric material, and depositing metal on the surface of a field effect transistor. Since the manufacturing process is typically a process where the deposition / growth of the dielectric material is very well controlled, field plate operation can be tightly controlled. Furthermore, the dielectric material deposited on the device surface need not be removed from the intrinsic region of the device. For this reason, a field-plated device can be realized without using a material that is less damaged by a dry or wet etching process. Using multi-gate field plates can also reduce gate resistance because of the use of multiple connections, thus improving the performance of large peripheral devices and / or sub-micron gate devices.
8-mar-2007
University of California, Cree Inc
JP2007505483A
Internazionale
Chini, Alessandro; Mishra, Umesh K.; Parikh, Primit; Wu, Yifeng
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1199993
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