One of the main predictability bottlenecks of modern multi-core embedded systems is contention for access to shared memory resources. Partitioning and software-driven allocation of memory resources is an effective strategy to mitigate contention in the memory hierarchy. Unfortunately, however, many of the strategies adopted so far can have unforeseen side-effects when practically implemented latest-generation, high-performance embedded platforms. Predictability is further jeopardized by cache eviction policies based on random replacement, targeting average performance instead of timing determinism.In this paper, we present a framework of software-based techniques to restore memory access determinism in high-performance embedded systems. Our approach leverages OS-transparent and DMA-friendly cache coloring, in combination with an invalidation-driven allocation (IDA) technique. The proposed method allows protecting important cache blocks from (i) external eviction by tasks concurrently executing on different cores, and (ii) internal eviction by tasks running on the same core. A working implementation obtained by extending the Jailhouse partitioning hypervisor is presented and evaluated with a combination of synthetic and real benchmarks.
Deterministic memory hierarchy and virtualization for modern multi-core embedded systems / Kloda, Tomasz; Solieri, M.; Mancuso, R.; Capodieci, N.; Valente, P.; Bertogna, M.. - 2019-:(2019), pp. 1-14. ((Intervento presentato al convegno 25th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2019 tenutosi a can nel 2019 [10.1109/RTAS.2019.00009].
Data di pubblicazione: | 2019 | |
Titolo: | Deterministic memory hierarchy and virtualization for modern multi-core embedded systems | |
Autore/i: | Kloda, Tomasz; Solieri, M.; Mancuso, R.; Capodieci, N.; Valente, P.; Bertogna, M. | |
Autore/i UNIMORE: | ||
Digital Object Identifier (DOI): | http://dx.doi.org/10.1109/RTAS.2019.00009 | |
Codice identificativo Scopus: | 2-s2.0-85064181704 | |
Codice identificativo ISI: | WOS:000482558000001 | |
Nome del convegno: | 25th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2019 | |
Luogo del convegno: | can | |
Data del convegno: | 2019 | |
Volume: | 2019- | |
Pagina iniziale: | 1 | |
Pagina finale: | 14 | |
Citazione: | Deterministic memory hierarchy and virtualization for modern multi-core embedded systems / Kloda, Tomasz; Solieri, M.; Mancuso, R.; Capodieci, N.; Valente, P.; Bertogna, M.. - 2019-:(2019), pp. 1-14. ((Intervento presentato al convegno 25th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2019 tenutosi a can nel 2019 [10.1109/RTAS.2019.00009]. | |
Tipologia | Relazione in Atti di Convegno |
File in questo prodotto:
File | Descrizione | Tipologia | |
---|---|---|---|
VOR_Deterministic Memory Hierarchy and Virtualization.pdf | Versione dell'editore (versione pubblicata) | Administrator Richiedi una copia | |
virt_IDA_rtas19.pdf | Post-print dell'autore (bozza post referaggio) | Open Access Visualizza/Apri |
Pubblicazioni consigliate

I metadati presenti in IRIS UNIMORE sono rilasciati con licenza Creative Commons CC0 1.0 Universal, mentre i file delle pubblicazioni sono rilasciati con licenza Attribuzione 4.0 Internazionale (CC BY 4.0), salvo diversa indicazione.
In caso di violazione di copyright, contattare Supporto Iris