This paper presents an ultra-low power (ULP), low quiescent current, low-dropout regulator with a class-AB and an adaptively biased error amplifier (EA). The high slew rate (SR) and the closed loop bandwidth improve the regulator transient response. Adapting the quiescent current regarding the transient response permits a high current efficiency at steady state. The stability is ensured for the entire output current range (1 µA – 3 mA) and for a maximum output capacitor of 100 pF by the current buffer compensation technique and the standard Miller capacitor compensation. The output voltage is set to 0.8 V with a minimum supply voltage of 0.92 V and a maximum quiescent current of 3.2 µA.
An ULP and Very Efficient Adaptively Biased LDO Regulator for Harvesting Application / Verrascina, Nicola; Begueret, Jean Baptiste; Borgarino, Mattia. - (2016), pp. 1-4. (Intervento presentato al convegno 2016 14th IEEE International New Circuits and Systems Conference tenutosi a Vancouver, Canada nel 26-29 June 2016) [10.1109/NEWCAS.2016.7604765].
An ULP and Very Efficient Adaptively Biased LDO Regulator for Harvesting Application
BORGARINO, Mattia
2016
Abstract
This paper presents an ultra-low power (ULP), low quiescent current, low-dropout regulator with a class-AB and an adaptively biased error amplifier (EA). The high slew rate (SR) and the closed loop bandwidth improve the regulator transient response. Adapting the quiescent current regarding the transient response permits a high current efficiency at steady state. The stability is ensured for the entire output current range (1 µA – 3 mA) and for a maximum output capacitor of 100 pF by the current buffer compensation technique and the standard Miller capacitor compensation. The output voltage is set to 0.8 V with a minimum supply voltage of 0.92 V and a maximum quiescent current of 3.2 µA.
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