A multistage ATM switch based on Clos interconnection of shared buffer switching elements is analyzed with the aim to develop design tools suitable for switch dimensioning in the range of ATM cell loss target. Starting from a simulation activity, which obtains the main switch performance and shows the effects of architectural and operational options, an approximated model is proposed. It is based on the discovery that statistical correlations in later stages of Clos network reduces so that it is feasible to treat different queue lengths as independent random variables to evaluate the cell loss performance of a shared buffer switching element. Approximate dimensioning of the whole switch is also performed. Results are given and verified in the range tractable by simulation for uniform and multiplexed bursty traffic

Simulation and Analytical Approximation of ATM Multistage Shared Buffer Switch / Casoni, Maurizio; C., Raffaelli. - STAMPA. - 2:(1996), pp. 1207-1211. (Intervento presentato al convegno IEEE Globecom 1996 tenutosi a Londra (UK) nel 18-22 Novembre 1996).

Simulation and Analytical Approximation of ATM Multistage Shared Buffer Switch

CASONI, Maurizio;
1996

Abstract

A multistage ATM switch based on Clos interconnection of shared buffer switching elements is analyzed with the aim to develop design tools suitable for switch dimensioning in the range of ATM cell loss target. Starting from a simulation activity, which obtains the main switch performance and shows the effects of architectural and operational options, an approximated model is proposed. It is based on the discovery that statistical correlations in later stages of Clos network reduces so that it is feasible to treat different queue lengths as independent random variables to evaluate the cell loss performance of a shared buffer switching element. Approximate dimensioning of the whole switch is also performed. Results are given and verified in the range tractable by simulation for uniform and multiplexed bursty traffic
1996
IEEE Globecom 1996
Londra (UK)
18-22 Novembre 1996
2
1207
1211
Casoni, Maurizio; C., Raffaelli
Simulation and Analytical Approximation of ATM Multistage Shared Buffer Switch / Casoni, Maurizio; C., Raffaelli. - STAMPA. - 2:(1996), pp. 1207-1211. (Intervento presentato al convegno IEEE Globecom 1996 tenutosi a Londra (UK) nel 18-22 Novembre 1996).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/742244
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