Designers of radio-frequency inductively-degenerated CMOS low-noise-amplifiers have usually not followed the guidelines for achieving minimum noise figure. Nonetheless, state-of-the-art implementations display noise figure values very close to the theoretical minimum. In this paper, we point out that this is due to the effect of the parasitic overlap capacitances in the MOS device. In particular, we show that overlap capacitances lead to a significant induced-gate-noise reduction, especially when deep sub-micron CMOS processes are used.

Serendipitous noise reduction in inductively degenerated CMOS RF LNAs / P., Rossi; P., Andreani; Mazzanti, Andrea; F., Svelto. - STAMPA. - (2003), pp. 24-27. (Intervento presentato al convegno NORCHIP 2003 tenutosi a Riga nel Novembre 2003).

Serendipitous noise reduction in inductively degenerated CMOS RF LNAs

MAZZANTI, Andrea;
2003

Abstract

Designers of radio-frequency inductively-degenerated CMOS low-noise-amplifiers have usually not followed the guidelines for achieving minimum noise figure. Nonetheless, state-of-the-art implementations display noise figure values very close to the theoretical minimum. In this paper, we point out that this is due to the effect of the parasitic overlap capacitances in the MOS device. In particular, we show that overlap capacitances lead to a significant induced-gate-noise reduction, especially when deep sub-micron CMOS processes are used.
2003
NORCHIP 2003
Riga
Novembre 2003
24
27
P., Rossi; P., Andreani; Mazzanti, Andrea; F., Svelto
Serendipitous noise reduction in inductively degenerated CMOS RF LNAs / P., Rossi; P., Andreani; Mazzanti, Andrea; F., Svelto. - STAMPA. - (2003), pp. 24-27. (Intervento presentato al convegno NORCHIP 2003 tenutosi a Riga nel Novembre 2003).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/606005
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