“On-chip” electronics fabricated on 6 kOhmxcm high resistivity wafer is fully characterized and spectroscopic measurements carried out. A new charge sensitive circuit is introduced to amplify the hole signals with on-chip n-channel JFETs and without any resetting devices. The JFET gate-source junction is forward biased and the drain current is stabilized by a low frequency feedback on the JFET p+ well contact (used as a buried gate for the JFET). Preliminary setups with PIN diodes and tetrode n-JFETs are successfully tested. With about 5 pF total input capacitance, resolution of 86 rms electrons at 223 K with 10 us shaping time is obtained. With about 2.7 pF, 60 rms electrons at 298 K with 10 us are obtained.

Charge preamplifier for hole collecting PIN diode and integrated tetrode N-JFET / A., Fazzi; G. U., Pignatel; G. F., DALLA BETTA; M., Boscardin; V., Varoli; Verzellesi, Giovanni. - ELETTRONICO. - (1999), pp. 533-537. (Intervento presentato al convegno IEEE Nuclear Science Symposium (NSS) tenutosi a Seattle (Washington, USA) nel Oct. 1999).

Charge preamplifier for hole collecting PIN diode and integrated tetrode N-JFET

VERZELLESI, Giovanni
1999

Abstract

“On-chip” electronics fabricated on 6 kOhmxcm high resistivity wafer is fully characterized and spectroscopic measurements carried out. A new charge sensitive circuit is introduced to amplify the hole signals with on-chip n-channel JFETs and without any resetting devices. The JFET gate-source junction is forward biased and the drain current is stabilized by a low frequency feedback on the JFET p+ well contact (used as a buried gate for the JFET). Preliminary setups with PIN diodes and tetrode n-JFETs are successfully tested. With about 5 pF total input capacitance, resolution of 86 rms electrons at 223 K with 10 us shaping time is obtained. With about 2.7 pF, 60 rms electrons at 298 K with 10 us are obtained.
1999
IEEE Nuclear Science Symposium (NSS)
Seattle (Washington, USA)
Oct. 1999
533
537
A., Fazzi; G. U., Pignatel; G. F., DALLA BETTA; M., Boscardin; V., Varoli; Verzellesi, Giovanni
Charge preamplifier for hole collecting PIN diode and integrated tetrode N-JFET / A., Fazzi; G. U., Pignatel; G. F., DALLA BETTA; M., Boscardin; V., Varoli; Verzellesi, Giovanni. - ELETTRONICO. - (1999), pp. 533-537. (Intervento presentato al convegno IEEE Nuclear Science Symposium (NSS) tenutosi a Seattle (Washington, USA) nel Oct. 1999).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/467014
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