Electrical probing of carrier separation in InAs/InP/GaAsSb core-dualshell nanowires

We investigate the tunnel coupling between the outer p-type GaAsSb shell and the n-type InAs core in catalyst-free InAs/InP/GaAsSb core-dualshell nanowires. We present a device fabrication protocol based on wet-etching processes on selected areas of the nanostructures that enables multiple configurations of measurements in the same nanowire-based device (i.e. shell-shell, core-core and core-shell). Low-temperature (4.2 K) transport in the shell-shell configuration in nanowires with 5 nm-thick InP barrier reveals a weak negative differential resistance. Differently, when the InP barrier thickness is increased to 10 nm, this negative differential resistance is fully quenched. The electrical resistance between the InAs core and the GaAsSb shell, measured in core-shell configuration, is significantly higher with respect to the resistance of the InAs core and of the GaAsSb shell. The field effect, applied via a back-gate, has an opposite impact on the electrical transport in the core and in the shell portions. Our results show that electron and hole free carriers populate the InAs and GaAsSb regions respectively and indicate InAs/InP/GaAsSb core-dualshell nanowires as an ideal system for the investigation of the physics of interacting electrons and holes at the nanoscale. [Figure not available: see fulltext.].