Low-power smart devices are becoming pervasive in our world. Thus, relevant research efforts are directed to the development of innovative low power computing solutions that enable in-memory computations of logic-operations, thus avoiding the von Neumann bottleneck, i.e., the known showstopper of traditional computing architectures. Emerging non-volatile memory technologies, in particular Resistive Random Access memories, have been shown to be particularly suitable to implement logic-in-memory (LIM) circuits based on the material implication logic (IMPLY). However, RRAM devices nonidealities, logic state degradation, and a narrow design space limit the adoption of this logic scheme. In this work, we use a physics-based compact model to study an innovative smart IMPLY (SIMPLY) logic scheme which exploits the peripheral circuitry embedded in ordinary IMPLY architectures to solve the mentioned reliability issues, drastically reducing the energy consumption and setting clear design strategies. We then use SIMPLY to implement a 1-bit full adder and compare the results with other LIM solutions proposed in the literature.

Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing / Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo. - In: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY. - ISSN 2168-6734. - 8:(2020), pp. 757-764. [10.1109/JEDS.2020.2987402]

Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing

Zanotti, Tommaso
;
Puglisi, Francesco Maria;Pavan, Paolo
2020

Abstract

Low-power smart devices are becoming pervasive in our world. Thus, relevant research efforts are directed to the development of innovative low power computing solutions that enable in-memory computations of logic-operations, thus avoiding the von Neumann bottleneck, i.e., the known showstopper of traditional computing architectures. Emerging non-volatile memory technologies, in particular Resistive Random Access memories, have been shown to be particularly suitable to implement logic-in-memory (LIM) circuits based on the material implication logic (IMPLY). However, RRAM devices nonidealities, logic state degradation, and a narrow design space limit the adoption of this logic scheme. In this work, we use a physics-based compact model to study an innovative smart IMPLY (SIMPLY) logic scheme which exploits the peripheral circuitry embedded in ordinary IMPLY architectures to solve the mentioned reliability issues, drastically reducing the energy consumption and setting clear design strategies. We then use SIMPLY to implement a 1-bit full adder and compare the results with other LIM solutions proposed in the literature.
2020
14-apr-2020
8
757
764
Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing / Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo. - In: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY. - ISSN 2168-6734. - 8:(2020), pp. 757-764. [10.1109/JEDS.2020.2987402]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1201617
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