Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is barrier instructions which are used to perform global synchronization across parallel processors. This scenario calls for a lightweight synchronization infrastructure. In this work we describe a lightweight barrier support library for a non-cache-coherent MPSoC architecture. The library is coupled with a parallelizing compiler front-end to set up a complete automated flow which, starting from a sequential code, produces the parallelized binary code that can be directly executed onto an MPSoC target (a multi-core non-cache-coherent ARM7 platform). This tool-flow has been characterized in terms of system performance and energy.
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms / Marongiu, A.; Benini, L.; Kandemir, M.. - (2007), pp. 145-149. (Intervento presentato al convegno CASES'07: 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems tenutosi a Salzburg, Austria nel 2007) [10.1145/1289881.1289908].
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms
A. MARONGIU;
2007
Abstract
Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is barrier instructions which are used to perform global synchronization across parallel processors. This scenario calls for a lightweight synchronization infrastructure. In this work we describe a lightweight barrier support library for a non-cache-coherent MPSoC architecture. The library is coupled with a parallelizing compiler front-end to set up a complete automated flow which, starting from a sequential code, produces the parallelized binary code that can be directly executed onto an MPSoC target (a multi-core non-cache-coherent ARM7 platform). This tool-flow has been characterized in terms of system performance and energy.
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