We present a new Monte Carlo technique to investigate the signal delay of advanced BJTs featuring relevant non-local effects. The method is suited to analyze base and collector signal delays in presence of significant nonequilibrium transport effects and up to high currents, and to verify the physical meaning and applicability of delay expressions for compact models.

We present a new Monte Carlo technique to investigate the signal delay of advanced BJTs featuring relevant non-local effects. The method is suited to analyze base and collector signal delays in presence of significant nonequilibrium transport effects and up to high currents, and to verify the physical meaning and applicability of delay expressions for compact models.

A Monte Carlo Technique to Investigate Signal Delays of Advanced Si BJT's up to High Currents / Palestri, Pierpaolo; Selmi, Luca; G. A. M., Hurkx; J. W., Slotboom. - (2000), pp. 46-49. (Intervento presentato al convegno International Conference on Simulation of Semiconductor Processes and Devices tenutosi a SEATTLE, WA nel SEP 06-08, 2000) [10.1109/SISPAD.2000.871203].

A Monte Carlo Technique to Investigate Signal Delays of Advanced Si BJT's up to High Currents

PALESTRI, Pierpaolo;SELMI, Luca;
2000

Abstract

We present a new Monte Carlo technique to investigate the signal delay of advanced BJTs featuring relevant non-local effects. The method is suited to analyze base and collector signal delays in presence of significant nonequilibrium transport effects and up to high currents, and to verify the physical meaning and applicability of delay expressions for compact models.
2000
International Conference on Simulation of Semiconductor Processes and Devices
SEATTLE, WA
SEP 06-08, 2000
46
49
Palestri, Pierpaolo; Selmi, Luca; G. A. M., Hurkx; J. W., Slotboom
A Monte Carlo Technique to Investigate Signal Delays of Advanced Si BJT's up to High Currents / Palestri, Pierpaolo; Selmi, Luca; G. A. M., Hurkx; J. W., Slotboom. - (2000), pp. 46-49. (Intervento presentato al convegno International Conference on Simulation of Semiconductor Processes and Devices tenutosi a SEATTLE, WA nel SEP 06-08, 2000) [10.1109/SISPAD.2000.871203].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11380/1163040
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