Study of threshold voltage instability in E-mode GaN MOS-HEMTs

In this work, the threshold instability in E-mode GaN MOS-HEMTs was investigated. In particular, the shift of VTH as a function of the applied positive gate voltage during device characterization was monitored, resulting in positive VTH shifts up to 1 V. A complete VTH recovery required more than one day of unbiased storage, but a partial recovery of the observed VTH shift was observed after few seconds. These results could be related to different positions of trap states: fast states, localized at the dielectric/GaN interface and slow states, the traps inside the dielectric layer. Moreover, VTH shift of 0.2 and 0.8 V for fast and slow states, respectively, was obtained. To gain insight into the physical mechanism involved in the observed phenomena, numerical simulation were also carried out. A VTH shift was obtained adding the interface states. Moreover, three different distributions of traps were compared. In particular, the concentration of filled traps was monitored to understand the impact of the distribution on the electrical behaviour. An increment in filled trap concentration at the increasing of the applied VGS, which in turns correlates with experimentally evaluated device behaviour, was obtained if the distribution of traps states is also above the GaN conduction band energy.