Sfoglia per Autore  PADOVANI, ANDREA

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Mostrati risultati da 1 a 20 di 162
Titolo Data di pubblicazione Autore(i) File
Profiling charge distribution in NROM devices 1-gen-2006 Padovani, Andrea; Larcher, Luca; Pavan, Paolo
Temperature Monitor: a New Tool to Profile Charge Distribution in NROMTM Memory Devices 1-gen-2006 L., Avital; Padovani, Andrea; Larcher, Luca; I., Bloom; R., Arie; Pavan, Paolo; B., Eitan
Modeling NAND Flash memories for circuit simulations 1-gen-2007 Larcher, Luca; Padovani, Andrea; I., Rimmaudo; Pavan, Paolo; A., Calderoni; G., Molteni; F., Gattel; P., Fantini
ID-VGS Based Tools to Profile Charge Distributions on NROMTM Memory Devices 1-gen-2007 Padovani, Andrea; Larcher, Luca; Pavan, Paolo; L., Avital; I., Bloom; B., Eitan
Statistical Methodologies for Integrated Circuits Design 1-gen-2007 Padovani, Andrea; A., Chimenton; P., Olivo; P., Fantini; L., Vendrame; S., Mennillo
Dielectric Reliability for Future Logic and Non-Volatile Memory Applications: a Statistical Simulation Analysis Approach 1-gen-2007 Padovani, Andrea; Larcher, Luca; A., Chimenton; Pavan, Paolo; P., Olivo
Hole Distributions in NROM Devices: Profiling Technique and Correlation to Memory Retention 1-gen-2007 Padovani, Andrea; Larcher, Luca; Pavan, Paolo
Monte-Carlo Simulations of Flash Memory Array Retention 1-gen-2007 Padovani, Andrea; Larcher, Luca; A., Chimenton; Pavan, Paolo
On the RESET-SET transition in Phase Change Memories 1-gen-2008 G., Puzzilli; F., Irrera; Padovani, Andrea; Pavan, Paolo; Larcher, Luca; A., Arya; DELLA MARCA, Vincenzo; A., Pirovano
Feasibility of SIO2/Al2O3 tunnel dielectric for future Flash memories generations 1-gen-2008 Padovani, Andrea; Larcher, Luca; S., Verma; Pavan, Paolo; P., Majhi; P., Kapur; K., Parat; G., Bersuker; K., Saraswat
Hole Distributions in Erased NROM Devices: profiling method and effects on reliability 1-gen-2008 Padovani, Andrea; Larcher, Luca; Pavan, Paolo
Statistical modeling of leakage currents through SiO2/high- κ dielectrics stacks for non-volatile memory applications 1-gen-2008 Padovani, A.; Larcher, L.; Verma, S.; Pavan, P.; Majhi, P.; Kapur, P.; Parat, K.; Bersuker, G.; Saraswat, K.
Modeling NAND Flash Memories for IC Design 1-gen-2008 Larcher, Luca; Padovani, Andrea; Pavan, Paolo; P., Fantini; A., Calderoni; A., Mauri; A., Benvenuti
Breakdown in the metal/high-k gate stack: Identifying the “weak link” in the multilayer dielectric 1-gen-2008 G., Bersuker; D., Heh; C., Young; H., Park; P., Khanal; Larcher, Luca; Padovani, Andrea; P., Lenahan; J., Ryan; B. H., Lee; H., Tseng; R., Jammy
Statistical modeling of leakage currents through SiO2/high-k dielectric stacks for non-volatile memory applications 1-gen-2008 Padovani, Andrea; Larcher, Luca; S., Verma; Pavan, Paolo; P., Majhi; P., Kapur; K., Parat; G., Bersuker; K., Saraswat
Connecting electrical and structural dielectric characteristics 1-gen-2009 G., Bersuker; D., Veksler; C. D., Young; H., Park; Morassi, Luca; Padovani, Andrea; Larcher, Luca; W., Taylor; P. D., Kirsch; R., Jammy
Understanding endurance degradation in Flash memory through transconductance measurement 1-gen-2009 S., Verma; G., Bersuker; D. C., Gilmer; Padovani, Andrea; H., Park; A., Nainani; J., Huang; K., Parat; P. D., Kirsch; Larcher, Luca; H. H., Tseng; K. C. Saraswat R., Jammy
Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing 1-gen-2009 Morassi, Luca; Larcher, Luca; L., Pantisano; Padovani, Andrea; R., Degreave; M. B., Zahid; B. J., O'Sullivan
A Novel Fluorine Incorporated Band Engineered (BE) Tunnel (SiO2/ HfSiO/ SiO2) TANOS with Excellent Program/Erase & Endurance to 10^5 Cycles 1-gen-2009 S., Verma; G., Bersuker; D. C., Gilmer; Padovani, Andrea; P., Hokyung; A., Nainani; D., Heh; J., Huang; J., Jiang; K., Parat; P. D., Kirsch; Larcher, Luca; Hsing Huang, Tseng; K. C., Saraswat; R., Jammy
Modeling TANOS Memory Program Transients to Investigate Charge Trapping Dynamics 1-gen-2009 Padovani, Andrea; Larcher, Luca; D., Heh; G., Bersuker
Mostrati risultati da 1 a 20 di 162
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